Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2000-12-06
2004-03-23
Dang, Khanh (Department: 2181)
Electrical computers and digital data processing systems: input/
Interrupt processing
C710S264000, C712S242000
Reexamination Certificate
active
06711641
ABSTRACT:
FIELD OF THE INVENTION
The present invention in general relates to an operation processing apparatus having a trap (interrupt) map for defining the corresponding relation of trap request and trap type code. More particularly, this invention relates to an operation processing apparatus capable of selecting one suited to the operating system to be used, from a plurality of trap maps.
BACKGROUND OF THE INVENTION
Hitherto, in a computer system, an operation processing apparatus designed according to the operating system to be used has been employed. This operation processing apparatus has a trap map for converting various trap requests occurring during process into codes called trap type code. When designing the operation processing apparatus, therefore, the trap map is designed to as to be suited to the operating system to be used.
However, in the conventional operation processing apparatus, when changing one operating system to a different operating system, the trap map must be newly designed, which is accompanied by many demerits from the viewpoint of designing time and cost. Therefore, the means and methods for solving such problems effectively have been keenly demanded so far.
FIG. 19
is a block diagram showing a configuration of a conventional operation processing apparatus. In this specification, the term “trap” is interpreted in a wide sense of meaning, including I-trap (Instruction Trap) detected when issuing an instruction, E-trap (Execution Trap) detected when executing an illegal instruction, trap detected at the time of asynchronous error or watchdog time-out, exception occurring in the program due to arithmetic overflow or the like, and interrupt due to external factor of I/O (Input/Output) or the like. Hence the “trap request” means request for processing (interrupt, etc.) corresponding to such “trap”.
The integer unit
10
is an operator for executing integer operation according to an integer operation command, and it issues a trap request
11
as required. The floating point unit
20
is an operator for executing a floating point operation according to a floating point operation command, and it issues a trap request
21
as required. The memory management unit
30
converts mutually between virtual address and physical address, and controls access to a cache memory (not shown), and it also issues a trap request
31
as required. The program counter/branch unit
40
counts execution programs, and predicts a branch address of branch instruction of program, and it also issues a trap request
41
as required.
The CPU local bus I/F controller
50
controls the flow of data on a local bus (not shown), and it issues a trap request
51
as required. The trap controller
60
has a function of ranking the priority of the trap requests
11
,
21
,
31
,
41
, and
51
, a function of converting a trap request
71
into trap type code
91
, and a function of reading and/or writing the trap type code
91
. The trap type code
91
is the data for identifying the cause of a trap. The trap controller
60
is composed of a priority controller
70
, a trap type encoder
80
, a read/write controller
100
, and a trap type register
110
.
If a plurality of requests are input at the same time, the priority controller
70
selects, out of the trap requests
11
,
21
,
31
,
41
, and
51
, the one with the highest priority and issues as trap request
71
according to the predetermined priority. The priority is determined in the sequence of trap request
11
>trap request
21
>trap request
31
>trap request
41
>trap request
51
. In this case, when trap request
11
and trap request
21
are given at the same time, the priority controller
70
issues the trap request
11
of higher priority as the trap request
71
.
The trap type encoder
80
encodes the trap request
71
from the priority controller
70
into the trap type code
91
that can be processed in the operation processing apparatus according to the trap map
90
. This trap map
90
conforms to a certain type of operating system. Therefore, if the trap map
90
is used in a different type of operating system, there is a possibility of malfunction.
The trap map
90
shown in
FIG. 20
defines the corresponding relation between plural trap requests and trap type code corresponding to them one by one. In the diagram, as the trap requests
71
(see FIG.
19
), trap request
71
0
(power#on#reset: the underbar is shown in the diagram, but “#” is used instead in the specification) to trap request
71
5
(data#access#MMU#error) are shown, and as the trap type code
91
(see FIG.
19
), trap type code
91
0
(0×001) to trap type code
91
5
(0×031) are shown. For example, when trap request
71
0
is given as the trap request
71
(see FIG.
19
), the trap type encoder
80
issues trap type code
91
0
(0×001) corresponding to the trap request
71
0
, as the trap type code
91
(see
FIG. 19
) according to the trap map
90
.
Referring again to
FIG. 19
, the read/write controller
100
writes the trap type code
91
from the trap type encoder
80
into the trap type register
110
, and reads the trap type code
91
from the trap type register
110
, and transfers it to a memory (not shown).
When the trap request
11
is issued only from the integer unit
10
, the priority controller
70
sends the trap request
11
to the trap type encoder
80
as trap request
71
. In this case, the trap request
71
is supposed to be trap request
71
0
shown in FIG.
20
. Hence, the trap type encoder
80
refers to the trap map
90
, and encodes the tarp request
71
0
into trap type code
91
0
(0×001). This trap type code
91
0
is, by the control of the read/write controller
100
shown in
FIG. 19
, written into the trap type register
110
, and is read and transferred to the memory (not shown).
In this conventional operation processing apparatus, the trap map
90
shown in
FIG. 20
corresponds to one certain type of operating system (or a system in short), and it has been designed exclusively for this operating system from the beginning. Therefore, when this operation processing apparatus is used in other operating system, the corresponding relation between the trap requests and trap type code is different, and hence malfunction may occur.
To avoid such problem, hitherto, it has been attempted to remake the trap map to be suited to other operating system, or exchange the trap type code at the operating system side.
Such measures, however, require must time and cost for remaking of trap map, or may be accompanied by other problems due to exchange of trap type code (lowering of performance), and hence they are not radical solutions for the problems due to difference in operating system.
Furthermore, in the conventional operation processing apparatus, the priority controller
70
shown in
FIG. 19
controls the priority corresponding to plural trap requests issued from every execution unit including the integer unit
10
, floating point unit
20
, . . . , and CPU local bus I/F controller
50
.
However, the priority cannot be controlled within the execution unit, and fine control cannot be done. That is, in the conventional operation processing apparatus, the priority cannot be controlled among plural trap requests issued at the same time in the execution unit, and the priority cannot be controlled according to the state of the execution unit.
SUMMARY OF THE INVENTION
It is an object of the present invention to provided an operation processing apparatus capable of applying easily and inexpensively in a plurality of systems (a first object), and executing a fine priority control to trap requests at the execution unit side (a second object).
In the operation processing apparatus according to one object of this invention, a selecting unit selects the first system (or second system), and an encoding unit encodes the trap request according to the first trap map (or second trap map) corresponding to the first system. Thus, the encoding unit has the first trap map and second trap map correspond
Dang Khanh
Fujitsu Limited
Staas & Halsey , LLP
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