Operation mode determining circuit for semiconductor memory devi

Details Operation mode determining circuit for semiconductor memory devi Operation mode determining circuit for semiconductor memory devi

1998-12-03

2000-05-23

Mai, Son

Static information storage and retrieval

Read/write circuit

Signals

365193, G11C 700

Patent

active

060672587

ABSTRACT:
An operation mode determining circuit for a semiconductor device, the circuit including a signal detecting circuit sensing first and second signals based on first and second internal signals generated after turning on the device, and an initial cycle detecting circuit sensing an initial cycle from at least one of the first and second internal signals, wherein the operation mode determining circuit determines an operation mode of the semiconductor device in accordance with the first and second signals.

REFERENCES:
patent: 5204837 (1993-04-01), Suwa et al.
patent: 5206551 (1993-04-01), Chern
patent: 5229969 (1993-07-01), Lee et al.
patent: 5278792 (1994-01-01), Inoue et al.
patent: 5365482 (1994-11-01), Nakayama
patent: 5457659 (1995-10-01), Schaefer
patent: 5532968 (1996-07-01), Lee
patent: 5774402 (1998-06-01), Lee
patent: 5818768 (1998-10-01), Sawada et al.

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