Operation controller for a semiconductor memory device

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – Having selection between plural continuous waveforms

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327293, 327294, H03K 1700

Patent

active

060609168

ABSTRACT:
A semiconductor memory device including an operation control circuit for selecting between a single data rate (SDR) mode and a double data rate (DDR) mode. The operation control circuit includes a mode selector for generating a master signal which selects between the SDR and the DDR mode. The operation control circuit also includes a shift register, a repeater, and a pulse generator. When the SDR mode is selected, the shift register generates an output clock signal which changes states every period of the input clock signal. When the DDR mode is selected, the repeater generates an output clock signal which changes states with every state change of the input clock signal. Productivity efficiency is enhanced and production costs are reduced by providing both the SDR and the DDR mode circuitry and the operation control circuit on a single chip.

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patent: 5336939 (1994-08-01), Eitrheim et al.
patent: 5668492 (1997-09-01), Pedersen et al.
patent: 5767720 (1998-06-01), Osera et al.
patent: 5850150 (1998-12-01), Mitra et al.

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