Static information storage and retrieval – Addressing – Sync/clocking
Patent
1998-08-14
2000-02-29
Fears, Terrell W.
Static information storage and retrieval
Addressing
Sync/clocking
365226, G11C 1300
Patent
active
060317868
ABSTRACT:
An operation control circuit of an integrated circuit memory device operates in a synchronous mode according to an internal clock signal. An internal clock controller generates an internal clock enable signal in response to a mode command. An internal clock generator generates the internal clock signal based on the internal clock enable signal and an external clock. In particular, an internal clock controller generates an internal clock enable signal in response to a mode command. Accordingly, the integrated circuit memory device may be free of a clock enable pin.
REFERENCES:
patent: 5267218 (1993-11-01), Elbert
Jang Tae-seong
Lee Sung-keun
Fears Terrell W.
Samsung Electronics Co,. Ltd.
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