Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2002-09-18
2004-03-16
Tran, Michael (Department: 2818)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S196000
Reexamination Certificate
active
06707745
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to operation control according to the temperature variation in an integrated circuit.
2. Description of the Related Art
Typical examples of the semiconductor memory device include DRAM and SRAM. As is well known, the DRAM is more affordable in price and has a larger capacity than the SRAM, but requires the refreshing operation. The SRAM does not require any refreshing operation and is easily handled, but is more expensive and has a smaller capacity than the DRAM.
A virtual SRAM (called VSRAM or PSRAM) is known as a semiconductor memory device having the advantages of the DRAM and the SRAM. The virtual SRAM has a memory cell array of dynamic memory cells like the DRAM, and includes a refresh controller to perform the internal refreshing operation. An external device (for example, a CPU) connecting with the virtual SRAM can thus gain access to the virtual SRAM (for reading or writing data) without being specifically conscious of the refreshing operation.
The semiconductor memory device is mounted on diverse electronic apparatuses, for example, cellular phones.
An expensive SRAM is generally used for the semiconductor memory device mounted on the cellular phone, because of the problem discussed below. The semiconductor memory device mounted on the cellular phone is required to attain low power consumption and have a low consumption level of electric current in standby state. The DRAM and the virtual SRAM, however, have the electric current consumption of 10 or greater times that of the SRAM, due to the working current for the refreshing operation. The DRAM and the virtual SRAM are accordingly not suitable for the cellular phones. This is the reason why the expensive SRAM is conventionally used for the cellular phone. Development of an inexpensive virtual SRAM having a low-consumption level of electric current equivalent to that of the conventional SRAM has thus been highly demanded.
SUMMARY OF THE INVENTION
The object of the present invention is thus to provide a technique applied for a semiconductor memory device, such as a virtual SRAM, to ensure a low-consumption level of electric current equivalent to that of a conventional SRAM.
In order to attain at least part of the above and the other related objects, the present invention is directed to a semiconductor memory device, which includes: a memory cell array of dynamic memory cells; a refresh control module having a refresh timer, which generates a refresh timing signal used to determine an execution timing of a refreshing operation of the memory cell array, the refresh control module causing the memory cell array to execute the refreshing operation in response to at least the refresh timing signal; a temperature detection module having a temperature sensing element, which includes a specific pn junction area set in a cutoff state out of pn junction areas formed on an identical semiconductor substrate with the memory cell array and outputs a leak current running through the specific pn junction area, the temperature detection module detecting a temperature change of the semiconductor memory device in response to the leak current output from the temperature sensing element; and a temperature characteristic regulation module that regulates a generation period of the refresh timing signal, based on a result of the detection by the temperature detection module.
The refresh period of the memory cell array is determined, depending upon a data holding time of the memory cell. The data holding time is varied with a variation in temperature of the memory cell or specifically with a variation in junction temperature of the pn junction area (pn junction) of a transistor included in the memory cell. The data holding time is shortened with an increase in temperature of the semiconductor memory device and is extended with a decrease in temperature of the semiconductor memory device.
In the semiconductor memory device of the above construction, the leak current output from the temperature sensing element is varied with a variation in temperature of the semiconductor memory device. The refresh period of the memory cell array may thus be regulated according to the leak current. The longer refresh period relatively decreases the frequency of the refreshing operation and thereby reduces the consumption of electric current required for the refreshing operation. Regulation of the refresh period according to the temperature change of the semiconductor memory device thus effectively reduces the consumption of electric current required for the refreshing operation. This attains the low-consumption level of electric current equivalent to that of the conventional SRAM. Here the ‘temperature of the semiconductor memory device’ represents the junction temperature of the pn junction area (pn junction) included in the memory cell array or the temperature sensing element or the environmental temperature of the semiconductor memory device.
In accordance with one preferable application of the semiconductor memory device, the temperature detection module has multiple temperature sensing elements of different leak currents, and detects the temperature change of the semiconductor memory device based on an output of one temperature sensing element selected among the multiple temperature sensing elements.
This arrangement desirably compensates for the possible difference among the multiple temperature sensing elements.
An active element set in the cutoff state may be used for the specific pn junction area.
The active element is, for example, a transistor or a diode.
The present invention is also directed to an integrated circuit, which includes: a specific circuit; a temperature detection module having a temperature sensing element, which includes a specific pn junction area set in a cutoff state out of pn junction areas formed on an identical semiconductor substrate with the specific circuit and outputs a leak current running through the specific pn junction area, the temperature detection module detecting a temperature change of the integrated circuit in response to the leak current output from the temperature sensing element; and a temperature characteristic regulation module that regulates a specific working characteristic of the specific circuit, based on a result of the detection by the temperature detection module.
In the integrated circuit of the present invention, the leak current output from the temperature sensing element is varied with a variation in temperature of the integrated circuit. The specific working characteristic of the specific circuit may thus be regulated according to the leak current. Here the ‘temperature of the integrated circuit’ represents the junction temperature of the pn junction area included in the specific circuit or the temperature sensing element or the environmental temperature of the integrated circuit.
In accordance with one preferable application of the integrated circuit, the temperature detection module has multiple temperature sensing elements of different leak currents, and detects the temperature change of the integrated circuit based on an output of one temperature sensing element selected among the multiple temperature sensing elements.
This arrangement desirably compensates for the difference among the multiple temperature sensing elements.
An active element set in the cutoff state may be used for the specific pn junction area.
The active element is, for example, a transistor or a diode.
In one preferable embodiment of the integrated circuit, the specific circuit is an oscillation circuit, and the temperature characteristic regulation module regulates an oscillation period of the oscillation circuit, based on the result of the detection by the temperature detection module.
In another preferable embodiment of the integrated circuit, the specific circuit is a delay circuit, and the temperature characteristic regulation module regulates a delay level of the delay circuit, based on the result of the detection by the temperature detect
Oliff & Berridg,e PLC
Seiko Epson Corporation
Tran Michael
LandOfFree
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