Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output command process
Reexamination Certificate
2000-12-06
2003-10-14
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output command process
Reexamination Certificate
active
06633925
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to data processing systems including one or more hosts and one or more data storage systems, such as a disk array, or direct access, storage device, with multiple physical disk drives and more specifically to a method and apparatus for enabling multiple hosts to issue optimized overlapping input-output, or I/O, requests to a particular logical device in the data storage system.
2. Description of Related Art
As the capabilities of data processing systems have increased, applications for use in those data processing systems have become more sophisticated. Now a data processing system may contain multiple hosts operating with independent host applications that access data in a large capacity data storage system either directly or over a network. Today, data storage systems are generally divided into logical devices or into blocks called by other names, such as logical volumes, data sets, files, etc. It is highly desirable that a single logical device in a data storage system be enabled to handle multiple concurrent requests for access to different files even from one or more different hosts and host applications.
A conventional data processing system includes a main frame computer or host including multiple central processors that interact with a data storage system. The data storage system generally includes a “disk array storage device,” or “direct access storage device” (e.g., a “DASD”) in which multiple physical disk drives are organized in multiple logical devices. The host communicates with the DASD through I/O requests provided by the operating system associated with the host. The host operating system heretofore has generally limited accesses to a given logical device to a single access at a time. For example, in the known MVS operating system, one unit control block (UCB) is assigned to each logical device. When a first I/O request identifies a file or dataset in a logical device, a UCB assigned to that logical device is set to a busy state until the entire I/O request is completed. Any following requests for the same logical device generated during the interval of the first request were queued to await the availability of that one UCB even though the I/O request was to a different file or dataset. Consequently, this feature forced all the I/O requests to a single logical device to be handled in seriatim.
There are some applications in which such an I/O request serialization may not adversely effect all operations. For example, in data storage systems that incorporate cache memory with the physical disk drives, write operations merely transfer data to the cache memory. Read operations that identify data within the cache memory are handled in a minimal time so there is a minimal delay until a next read or write operation can be started. If it could be assured that all such requests could be handled in the cache memory, serialization would impose a minimal penalty. However, in most applications data will be required that is not in the cache memory, so access to a physical disk drive for the data will be necessary. The resulting interval for transferring data from the physical disk drive to the cache memory is significantly longer than the time to transfer data between the host and the cache memory. Consequently, other write and read requests, that might otherwise access data already in the cache, are delayed until the read miss operation has been completed. In these situations serialization adversely affects host processing significantly.
In accordance with one new approach an operating system that normally uses one unit control block, or UCB, defines that UCB as a “base UCB”. A number of unassigned UCB's are allocated to the same logical device. These are known as alias UCB's. In accordance with this approach a host can issue concurrent or overlapped I/O requests by assigning each different request to one of the base or alias UCB's up to the total number of UCB's allocated to the logical device. However, this approach is imbedded in an upgrade to an existing operating system. It has not been possible to retrofit existing operating systems with this feature. As a result in many installations there is a strong reluctance to adopt this desirable feature because significant personnel and equipment resources must be allocated to the installation of such an upgrade. What is needed is an ability to provide existing operating systems with a parallel access feature.
SUMMARY
Therefore it is an object of this invention to provide a method and apparatus for allowing multiple concurrent accesses to a single logical device in a data storage system.
Another object of this invention is to provide multiple concurrent accesses to a single logical device in a data storage system utilizing a conventional operating system.
A host normally responds to an input-output request to effect a transfer with a specified location within a logical volume in a disk array storage device by system utilizes a first, uniquely identified, base unit control block corresponding to the logical volume to effect a transfer in response to the input-output request. In accordance with this invention, at least one uniquely identified related unit control block is defined to identify the logical volume. Operating system response is interrupted in response to an input-output request. One of the base and related unit control blocks is assigned to the input-output request. Then input-output request is processed by returning control to the operating system identifying the assigned control block whereby the host operating system can issue overlapped input-output requests to the given logical volume.
REFERENCES:
patent: 5530897 (1996-06-01), Meritt
patent: 6167459 (2000-12-01), Beardsley et al.
patent: 6170023 (2001-01-01), Beardsley et al.
patent: 6185638 (2001-02-01), Beardsley et al.
patent: 6240467 (2001-05-01), Beardsley et al.
Fairchild William R.
LeCrone Douglas E.
Murphy Daniel A.
EMC Corporation
Gaffin Jeffrey
Herbster George A.
Schneider Joshua D
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