Operating method for ROM array which minimizes band-to-band tunn

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257390, H01L 2976

Patent

active

058380469

ABSTRACT:
A read only memory (ROM) array is disclosed which includes a) a voltage supply providing an operating voltage level, b) a plurality of word-lines, c) a multiplicity of ROM transistors, and d) a word-line clamper. The ROM transistors are divided into turned on and turned off transistors. Each ROM transistor has a gate connected to one of the word-lines, a gate oxide beneath the gate, whose thickness is less than 250 .ANG., and a channel beneath the gate oxide. The turned off transistors additionally have a ROM implant in their channel whose dosage is no larger than the amount which generates a predetermined desired minimal band-to-band tunneling current The ROM implant and gate oxide thickness define a threshold voltage for the tamed off tranistors, the threshold voltage being less than the operating voltage level. The word-line damper provides a word-line voltage to each of the word-lines, the word-line voltage being clamped to a voltage level no higher than the threshold voltage of the turned off transistor.

REFERENCES:
patent: 4592020 (1986-05-01), Takemae et al.
patent: 4888735 (1989-12-01), Lee et al.

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