Operating circuit for galois field

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3647461, G06F 1110

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active

054147190

ABSTRACT:
An operating circuit of a Galois Field for executing an operation of the Galois field efficiently and rapidly includes an operating circuit (11) for receiving two elements of a Galois field, for performing an addition or a multiplication of the two elements, and for outputting a first operational result, an operating circuit (12) for receiving another two elements of the Galois field, for performing an addition or a multiplication of another two elements, and for outputting a second operational result, an operating circuit (13) for performing an addition of the first operational result and the second operational result on the Galois field, and for outputting a third operational result, a multiplexer (14) for selecting and one of the first operational result and the third operational result, and for outputting a selected result, a multiplexer (15) for selecting any one of the second operational result and the third operational result, and for outputting the selected result, a flag-decision circuit (18) for determining the first operational result and the second operational result as well as the third operational result.

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Proceedings of Institute of Television Engineers of Japan, pp. 227-228, Shirota et al: "A Structure of Error Correction LSI", date unknown.
Murakami et al: "Signal Processor LSI for Digital VTR," Journal of Institute of Television Engineers of Japan, vol. 43, No. 12, pp. 1333-1339, 1989.
Nakase et al: "Control Method of Reed-Solomon Decoder for Digital VTRs," pp. 115-116, Proceedings of ITEC'91, 1991.

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