Operand collector architecture

Computer graphics processing and selective visual display system – Computer graphics display memory system – Cache

Reexamination Certificate

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Details

C345S531000, C345S505000

Reexamination Certificate

active

07834881

ABSTRACT:
An apparatus and method for simulating a multi-ported memory using lower port count memories as banks. A collector units gather source operands from the banks as needed to process program instructions. The collector units also gather constants that are used as operands. When all of the source operands needed to process a program instruction have been gathered, a collector unit outputs the source operands to an execution unit while avoiding writeback conflicts to registers specified by the program instruction that may be accessed by other execution units.

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English Abstract of JP 62-242243 (provided as explanation of relevance).
English Translation of JP 6-332721 (provided as explanation of relevance).
English Translation of JP 11-184674 (provided as explanation of relevance).
English Translation of JP 2003-241961 (provided as explanation of relevance).
English Translation of JP 2003-256199 (provided as explanation of relevance).

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