Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Patent
1993-04-12
1995-04-11
Westin, Edward P.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
326 83, 327380, H03K 1716
Patent
active
054062152
ABSTRACT:
An open drain output circuit includes a package having a reference potential section on at least a portion thereof. An output terminal of the circuit disposed on the package is connected through a load resistor to an external power supply. A common terminal also disposed on the package is connected to an external point of reference potential. A parasitic load capacitance is formed between the common terminal and the load resistor. A field effect transistor having drain, source and gate regions is disposed within the package. The drain and source regions are connected to the output and common terminals, respectively. The conductivity of the drain-source conduction path is variable in accordance with the value of a control voltage applied between the gate and source regions. Connections of the drain and source regions to the output and common terminals, respectively, provide parasitic inductances. Parasitic capacitance is formed between the drain region and the reference potential section and between the source region and the reference potential section. Control voltage generating means generates the control voltage in such a manner that the rate of change of the control voltage decreases as it changes from a high level to a low level and overshoot in the output signal is thereby reduced.
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Gunning et al., "GTL: A Low Voltage Swing Transmission Line Transceiver"; published in JEDEC, Solid State Products Engineering Council; JC-35-31, Survey Ballot; Aug. 2, 1991.
Driscoll Benjamin D.
Mitsubishi Denki & Kabushiki Kaisha
Morrison Thomas R.
Pastel Christopher R.
Westin Edward P.
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