Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-11-22
2005-11-22
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S029000, C710S036000, C710S052000, C711S002000, C345S564000
Reexamination Certificate
active
06968415
ABSTRACT:
An opaque memory region for a bridge of an I/O adapter. The opaque memory region is inaccessible to memory transactions which traverse the bridge either from a primary bus to secondary bus or secondary bus to primary bus. As a result, memory transactions which target the opaque memory region are ignored by the bridge, allowing for the same address to exist on both sides of the bridge with different data stored in each. The implementation of the opaque memory region provides a means to complete memory transactions within I/O adapter subsystem memory, hence, relieving host computer system memory resources. In addition, a number of I/O adapters can be used in a host computer system where the host and all the I/O devices use some of the same memory addresses.
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Bronson Timothy C.
Jackowski Stefan P.
Sheplock John M.
Williams Phillip G.
Hoffman Warnick & D'Alessandro LLC
King Justin
Schiesser William E.
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