Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-09-10
2004-08-17
Tran, Minhloan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S406000, C257S314000, C257S315000, C257S316000, C257S324000, C438S201000, C438S211000, C438S257000, C438S261000, C438S791000
Reexamination Certificate
active
06777764
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to semiconductor devices and fabrication methods, and, more particularly, to an ONO interpoly dielectric for flash memory cells and method for fabricating the same using a single wafer low temperature deposition process.
BACKGROUND OF THE INVENTION
One type of semiconductor device is a flash memory device, which includes a floating-gate electrode for storing electrical charge. The electrical charge is provided from a channel region underneath the floating-gate electrode. The floating-gate electrode typically includes a dielectric material for storing the electrical charge. A common dielectric structure for a floating-gate electrode is an oxide-nitride-oxide nitride-oxide (“ONO”) structure.
This type of structure plays an essential role regarding operating characteristics and reliability of the flash memory device. A high quality ONO dielectric structure should provide, e.g., low defect density, long mean time to failure, and high charge retention capability.
One method for forming an ONO dielectric uses a single wafer thermal process. A conventional process requires an elevated high temperature of about 800° C. to deposit the dielectric film. This process has a number of disadvantages because of the high temperature. For example, the high temperature process can cause surface roughness of the dielectric material, low time dependent dielectric breakdown (“TDDB”), and low yields.
Thus, what is needed is a low temperature deposition process to deposit an ONO dielectric material and to reduce the surface roughness of the ONO dielectric material.
SUMMARY OF THE INVENTION
In accordance with the invention, there is provided a method of manufacturing a semiconductor device, including providing a wafer substrate, forming a first silicon oxide layer over the wafer substrate, forming a nitride layer over the first silicon oxide layer using a low temperature deposition process, and forming a second silicon oxide layer over the nitride layer. In one aspect, the first silicon oxide layer is formed over a floating gate poly.
Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
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Han Tzung-Ting
Hsieh Jung-Yu
Forde Remmon R.
Macronix International Co. Ltd.
Tran Minhloan
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