One step write circuit arrangement for EEPROMS

Static information storage and retrieval – Systems using particular element – Semiconductive

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365189, G11C 1134

Patent

active

045787778

ABSTRACT:
A novel write circuit arrangement for an EEPROM type memory system operable in response to the difference between the information stored in each addressed cell and the information to the be stored therein during a writing cycle and writing information into only those addressed cells for which a difference exists regardless of whether the difference indicates to charge or discharge the cell. The arrangement also can simultaneously charge one cell of a byte while discharging another cell of the same byte.

REFERENCES:
patent: 4090258 (1978-05-01), Cricchi
patent: 4149270 (1979-04-01), Cricchi et al.
patent: 4354256 (1982-10-01), Miyasaka
patent: 4377857 (1983-03-01), Tickle
patent: 4477884 (1984-10-01), Iwahashi et al.

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