One-device random access memory having enhanced sense signal

Static information storage and retrieval – Read/write circuit – Flip-flop used for sensing

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365149, 365207, G11C 700, G11C 1124, G11C 1140

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active

045063516

ABSTRACT:
An improved one-device random access memory comprises an array of memory cells arranged in rows and columns. Each cell comprises a transistor and a capacitor, with one of the transistors controlled electrodes being connected to one of the capacitor plates. The controlling electrodes of all the transistors in a column are connected to a word line. The other controlled electrodes of all the transistors in a row are connected to a bit line, while the other plate of all the capacitors in a row are connected to a sense line. Each row also includes a differential sense amplifier coupled between the bit and sense lines. Each row also includes a dummy cell connected to the sense line, the dummy cell having a capacitor of the same sense as the cell capacitor, and storing the same charge thereon as a cell capacitor.
The memory is fabricated on a semiconductor substrate, and the bit line capacitance is made substantially greater than the sense line capacitance. The memory also includes bit and sense line load isolators between respective bit and sense lines and the sense amplifiers. The bit line load isolators are controlled in a manner which provides an automatic refresh of sensed data. The sense line load isolators are controlled to prevent unselected cells from being disturbed during the refresh operation.

REFERENCES:
patent: 3196405 (1965-07-01), Gunn
patent: 3387286 (1968-06-01), Dennard
patent: 3699537 (1972-10-01), Wahlstrom
patent: 3838404 (1974-09-01), Heeren
patent: 3876992 (1975-04-01), Pricer
patent: 3986180 (1976-10-01), Cade
patent: 4027294 (1977-05-01), Meusburger et al.
patent: 4188671 (1980-02-01), Lynes
patent: 4367540 (1983-01-01), Shimohigashi
Lee, "Cross-Coupled Latch for Memory Sensing", IBM Tech. Disc. Bul., vol. 17, No. 5, 10/74, pp. 1361-1362.
IBM Technical Disclosure Bulletin, vol. 23, No. 6, Nov. 1980, "One-Device Memory Cell Arrangement with Improved Sense Signals", L. Arzubi & W. D. Loehlein, pp. 2331-2332.

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