Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-08-23
2005-08-23
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S733000
Reexamination Certificate
active
06934884
ABSTRACT:
In order to provide a built-in self testing function, a one-chip microcomputer is equipped with an activation register for activating the test operation and a built-in self test activation pattern generator for setting initial values at test control circuits (pseudo random number generator, logical circuit testing compressor, pattern generator, and memory testing compressor). In accordance with an instruction from the CPU, a built-in self test is activated so that the results of tests of the memory and the group of logical circuits are read from the memory testing compressor and the logical circuit testing compressor, and respectively compared with expected values preliminarily stored in the memory in the one-chip microcomputer; thus, the results are diagnosed. Thus, it is possible to carry out a built-in self test without using a plurality of exclusively-used test terminals.
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Suto Hiroki
Takeda Tadao
Tanno Masaaki
Wakabayashi Masaki
Yaegawa Kazuhiro
Beausoliel Robert
Birch Stewart Kolasch & Birch, LLP.
Duncan Marc
Nippon Telegraph and Telephone Corporation
Sharp Kabushiki Kaisha
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