Static information storage and retrieval – Read/write circuit – Testing
Patent
1997-10-31
1999-07-27
Hoang, Huan
Static information storage and retrieval
Read/write circuit
Testing
365 51, 365 52, 365 63, 257203, 257909, G11C 700
Patent
active
059301872
ABSTRACT:
An LSI chip has a main surface occupied by a logic section, a data input/output section and a memory macro section. The memory macro section is a rectangular section arranged on the main surface of the LSI chip. A test control circuit is arranged along one side of the memory macro section. A data input/output circuit is arranged along another side of the memory macro section. The test control circuit may be arranged along one side of the LSI chip. Test data is supplied from the test control circuit to the data input/output circuit through a data bus. As a result, a load of designing a memory logic LSI can be lightened.
REFERENCES:
patent: 5680355 (1997-10-01), Saruwatari
patent: 5698876 (1997-12-01), Yabe et al.
Miyano Shinji
Sato Katsuhiko
Hoang Huan
Kabushiki Kaisha Toshiba
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