On-the-fly RTL instructor for advanced DFT and design closure

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07441210

ABSTRACT:
A method for developing a circuit design is disclosed. The method generally includes the steps of (A) editing a file for a circuit design based on a plurality of edits received from a designer, the file containing a code written in a hardware description language, (B) characterizing the code in the file while the designer is editing the code to generate a plurality of characterization results and (C) generating a plurality of suggestions to the designer to modify the code based on a comparison of a plurality of goals for the circuit design and the characterization results.

REFERENCES:
patent: 2002/0162086 (2002-10-01), Morgan
patent: 2003/0182642 (2003-09-01), Schubert et al.
patent: 2003/0208723 (2003-11-01), Killian et al.
patent: 2004/0221249 (2004-11-01), Lahner et al.

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