Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-10-18
2004-08-03
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S032000
Reexamination Certificate
active
06772371
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The invention relates generally to debugging switching nodes in a data transmission network, and in particular, to an on-line system and method for debugging a protocol engine of a switching node in a data transmission network.
2. Description of the Related Art
The extensive use of data transmission networks such as Asynchronous Transfer Mode (ATM) networks that operate at high speeds raises the problem of debugging the protocol engine within a switching node in an efficient manner in order to avoid loss of data through the protocol engine.
Past experience has demonstrated that debugging a protocol engine is very time consuming and thus may result in “field critical situations”. A major reason for such a slow debugging process is the transparency of the causes of protocol engine failures resulting from limited observation access during real-time operation when failures occur.
Hardware analyzers are conventionally utilized for protocol engine debugging. The value in hardware analyzers in this context is limited by the fact that hardware analyzers only provide observation of external busses along with internal information that is routed to free output probes. Thus, the analyzer can detect the status of the signals within each component of a system at a specified test time. If, however, the bug is not revealed at this precise time, the analyzer is not able to detect the causes of the problem.
A possible solution to this problem is to recreate the bug utilizing the same original data on the same data paths. This solution, however, is time-consuming and is not always efficient since it requires the continued operation of the hardware during the analysis, resulting in instability and a lack of identical problem reproduction.
It would therefore be useful to provide a non-intrusive system and method for debugging a network switching node during real-time operations.
SUMMARY OF THE INVENTION
A system and method for freezing a processing unit to facilitate on-line debugging of a protocol engine within a switching node of a data transmission network are disclosed herein. In accordance with the system of the present invention, the protocol engine includes a plurality of processing units such as an identification unit, a lookup unit, a traffic management and congestion unit, an enqueue unit, a dequeue unit, a traffic management scheduling unit, a frame transmission unit, a control unit, and a control block unit. The control block unit includes a freeze register containing multiple freeze bits, wherein each freeze bit is associated with one processing unit. In response to setting a freeze bit, resources and settings of a processing unit associated with the set freeze bit are prevented from being changed by the processing unit.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
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Orsatti Daniel
Rigal Dominique
Rousseau Bruno
Zunino Jean-Claude
Beausoliel Robert
Bracewell & Patterson
McConnell Daniel E.
Puente Emerson
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