Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-06-28
2009-02-24
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S027000, C326S086000, C326S087000
Reexamination Certificate
active
07495469
ABSTRACT:
An on-die termination circuit is capable of increasing a resolution without enlargement of a chip or a layout size. The on-die termination circuit includes a control means, a termination resistance supply means, a code signal generating means. The control means sequentially generates a plurality of control signals in a response to a driving signal. The termination resistance supply means supplies a termination resistance in response to a coarse code signal having a plurality of bits and a fine code signal having a plurality of bits. The code signal generating means controls the fine code signal and the coarse code signal in response to the plurality of the control signals in order that the termination resistance has a level which is correspondent to an input resistance.
REFERENCES:
patent: 6326821 (2001-12-01), Gabara
patent: 6456124 (2002-09-01), Lee et al.
patent: 2004/0008054 (2004-01-01), Lesea et al.
patent: 2005-39549 (2005-02-01), None
patent: 10-2004-0083814 (2004-10-01), None
patent: 10-2005-0019453 (2005-03-01), None
patent: 10-2006-0066835 (2006-06-01), None
Barnie Rexford
Blakely & Sokoloff, Taylor & Zafman
Hynix / Semiconductor Inc.
Tran Jany
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