Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2007-04-24
2007-04-24
Chang, Daniel D. (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S113000
Reexamination Certificate
active
11008043
ABSTRACT:
The present invention discloses an on die termination circuit. The on die termination circuit used in a DDR2 employs transmission gates as pull-up and pull-down switches, equalizes pull-up and pull-down resistance values by changing connection relations between switches and resistors, and maintains a constant voltage of an input pin.
REFERENCES:
patent: 6470054 (2002-10-01), Boudry et al.
patent: 6642740 (2003-11-01), Kim et al.
patent: 2004/0141391 (2004-07-01), Lee et al.
patent: 2003-6525 (2003-01-01), None
Official Action for Korean Patent Application No. 2004-24184 dated Nov. 22, 2006.
Offical Action for Taiwanese Patent Application No. 93138857 dated Dec. 19, 2006 (English translation only).
Chang Daniel D.
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
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