On-die system and method for controlling termination...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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C327S108000

Reexamination Certificate

active

07852112

ABSTRACT:
A system for controlling the termination impedance of memory device data bus terminals is fabricated on the same die as the memory device. The system includes a termination resistor connected to each data bus terminal, which is connected in parallel with several transistors that are selectively turned on to adjust the termination impedance. The transistors are controlled by a circuit that determines the resistance of the termination resistor and turns on the correct number of transistor to properly set the termination impedance. In one example, the resistance of the termination resistor is determined by directly measuring a resistor of the same type as the termination resistor. In another example, the resistance of the termination resistor is determined indirectly by measuring parameters that affect the resistance of the termination resistor. In either case, the system can maintain the termination impedance of the data bus terminals constant despite changes in the termination resistor.

REFERENCES:
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patent: 6509778 (2003-01-01), Braceras et al.
patent: 6556052 (2003-04-01), Garrett et al.
patent: 6674302 (2004-01-01), Yen
patent: 6768393 (2004-07-01), Song
patent: 6967500 (2005-11-01), Lin et al.
patent: 7148721 (2006-12-01), Park
patent: 7323900 (2008-01-01), Kim
patent: 2006/0226868 (2006-10-01), Lee et al.
“On Die Termination”; DDR II topic; pp. 1 and 2 date-Aug. 18, 2005.

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