Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2001-11-01
2003-05-20
Le, Dinh T (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C326S083000, C326S081000, C326S062000
Reexamination Certificate
active
06566932
ABSTRACT:
This application relies for priority upon Korean Patent Application No. 2001-20768, filed on Apr. 18, 2001, the contents of which are herein incorporated by reference in their entirety.
FIELD OF THE INVENTION
The present invention generally relates to a voltage level converting device, and more specifically to an on-chip system having a voltage level converting device serving to convert voltages between modules operating with different operating voltages.
BACKGROUND OF THE INVENTION
In system design, realizing a system having multi-functions with low power consumption is an important concern with respect to mobility and multi-functions in system. Accordingly, it is important to lower the power supply voltage. Moreover, the power supply voltages have been separated such that they can be individually supplied, depending on various functions of internal blocks. For the purpose of achieving low power consumption in the system, it is desired that the constituent parts thereof be designed to reduce the power in accordance with an operating mode and be configurted in an architecture minimizing the power consumption. To reduce the power consumption according to the operating modes, a power-down mode and power-off mode are provided for the system having central processing unit (CPU), real time clock circuit, clock control circuit, memory control circuit, etc.
If the system enters the power-down mode, only the CPU in the system operates. At that time, the clock is not supplied for the rest of the functional blocks or modules, thereby reducing dynamic current due to the clock. Accordingly, the power consumed can be reduced. Further, if the system enters the power-off mode, the power supply voltage is interrupted in blocks or modules when the system is not in use, except in required blocks.
In case that the power supply voltage is separated between modules and is different for each module in the system, a leakage current can be generated due to differences in the power supply voltage level for a signal transferred between the modules. For instance, it is assumed that a signal is transferred from a first module operating in a voltage of 2.5V to a second module operating in a voltage of 3.0V, and a well-known complementary metal oxide semiconductor (CMOS) inverter is used as the input or reception circuit for the second module. If the transmission signal is at a high level, a N-channel MOS transistor can be completely turned on. However, the P-channel MOS transistor where gate voltage is 2.5V and source voltage is 3.0V is not completely turned off. Hence, a small amount of leakage current flows from the power supply voltage to ground voltage through the PMOS and NMOS transistors.
To prevent the leakage current caused by the voltage level difference, the system employs voltage level converting circuit generally referred to as a “level shifter”. A well-known voltage level converting circuit in this field is shown in FIG.
1
. Referring to
FIG. 1
, the voltage level converting circuit as an interface circuit between the modules converts a voltage level of an input signal IN transferred from a 2.5V module to a 3.0V module. Two inverters INV
1
and INV
2
, two PMOS transistors MP
1
and MP
2
, and two NMOS transistors MN
1
and MN
2
compose the circuit. As indicated in dashed line, the inverter INV
1
operates in the operating voltage VDD
1
of the 2.5V module, and the rest of the components operate in the 3.0V module.
It is assumed that the power supply voltage of the first module is interrupted in the power-off mode, while the power supply voltage of the second module continues to be supplied in the power-off mode. The voltage level converting circuit shown in
FIG. 1
has a problem when the system enters the power-off mode. That is, the leakage current flows within the voltage level converting circuit in the power-off mode, which results in harm to the low power structure of the system.
Specifically, when the system enters the power-off mode, the power supply voltage of the module generating the input signal IN is interrupted. Thus, the input signal IN and a reversed input signal nIN are conducted to be floating status, so that the signals have unstable values. Because of the bistable characteristic of the voltage level converting circuit, nodes N
1
and N
2
try to retain current stable voltage level. However, a lot of leakage current can be generated at a critical point as the signals IN and nIN are changed to be unstable. For instance, in the case that the signals IN and nIN turn to voltage level of logic ‘1’, the nodes N
1
and N
2
turn to logic ‘0’, and the PMOS transistors MP
1
and MP
2
are turned on. Since the NMOS transistors MN
1
and MN
2
are turned on, a lot of leakage current flows from the power supply voltage VDD
2
to the ground voltage.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide an improved voltage level converting circuit applicable to low power consumption.
It is another object of the present invention to provide a voltage level converting circuit for effectively preventing internal leakage current caused by an input signal in unstable status.
It is further another object of the present invention to provide an on-chip system employing a voltage level converting circuit capable of preventing leakage current generated when a power supply voltage of a transmitting module is interrupted.
In order to attain the above objects, according to an aspect of the present invention, there is provided an interface circuit which serves to convert voltage level between modules. The interface circuit includes a voltage level converting circuit referred to as a “level shifter”. According to a preferred embodiment of the invention, the voltage level converting circuit includes an input control circuit allowing the voltage level converting circuit to operate a normal voltage converting operation in a normal operating mode while preventing a leakage current path of the voltage level converting circuit due to an unstable input signal in a power-off mode.
According to another embodiment of the invention, the voltage level converting circuit includes a current path cut-off circuit which allows the voltage level converting circuit to operate the normal voltage converting operation in the normal operating mode, like the input control circuit. Meanwhile, in the power-off mode, the current path cut-off circuit interrupts a ground path of the voltage level converting circuit in order to prevent a leakage current path of the voltage level converting circuit due to an unstable input signal.
In accordance with the present invention, there is provided an on-chip system. The system includes a first module operated at a first power supply voltage and blocked from the first power supply voltage in a power-off mode. A second module is operated at a second power supply voltage and is supplied with a second power supply voltage even in the power-off mode. An interface circuit is connected between the fist module and the second module. The interface circuit includes a level converting section having input transistors for converting a voltage level of the first power supply voltage provided from the first module to a voltage level of the second power supply voltage. The interface circuit also includes means for preventing the input transistors from being synchronously activated in response to a control signal when a signal provided from the first module is unstable in the power-off mode.
In one embodiment, the control signal is at a high level in a normal operating mode and at a low level in the power-off mode. The control signal can be created in a control signal generating circuit which includes an output terminal of the first module and a resistor connected between the output terminal and ground voltage. The control signal can be provided from a connecting node of the resistor and the output terminal. The output terminal of the first module can be at a high level in the normal operating mode and in a floating status in the power-off mode.
In one embodiment, the
Le Dinh T
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
LandOfFree
On-chip system with voltage level converting device for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with On-chip system with voltage level converting device for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and On-chip system with voltage level converting device for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3020189