Electrical computers and digital data processing systems: input/ – Access arbitrating
Reexamination Certificate
2007-12-20
2010-06-22
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Access arbitrating
C711S151000
Reexamination Certificate
active
07743191
ABSTRACT:
A method and architecture are provided for SOC (System on a Chip) devices for RAID processing, which is commonly referred as RAID-on-a-Chip (ROC). The architecture utilizes a shared memory structure as interconnect mechanism among hardware components, CPUs and software entities. The shared memory structure provides a common scratchpad buffer space for holding data that is processed by the various entities, provides interconnection for process/engine communications, and provides a queue for message passing using a common communication method that is agnostic to whether the engines are implemented in hardware or software. A plurality of hardware engines are supported as masters of the shared memory. The architectures provide superior throughput performance, flexibility in software/hardware co-design, scalability of both functionality and performance, and support a very simple abstracted parallel programming model for parallel processing.
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Behmann Curtis B.
Borden Ladner Gervais LLP
Dang Khanh
PMC-Sierra Inc.
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