On-chip refresh for dynamic memory

Details On-chip refresh for dynamic memory On-chip refresh for dynamic memory

1978-06-26

1980-06-10

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Data refresh

G11C 700

Patent

active

042076188

ABSTRACT:
A semiconductor device comprises an array of rows and columns of dynamic-type memory cells with on-chip refresh circuitry including an address counter and a multiplexer to insert the refresh address when a system command is received indicating a refresh cycle. The refresh address counter is incremented after each refresh cycle. If a refresh command is not present, the device is accessed in the usual manner.

REFERENCES:
patent: 3729722 (1973-04-01), Shuba
patent: 4006468 (1977-02-01), Webster
patent: 4050061 (1977-09-01), Kitagawa

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