Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
1998-12-02
2001-02-13
Lee, Thomas C. (Department: 2782)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S008000, C710S011000, C710S036000
Reexamination Certificate
active
06189052
ABSTRACT:
PRIORITY CLAIMED
This application claims the benefit of priority to Swedish Application No. 9704627-0, filed Dec. 11, 1997, entitled I/O Processor, which is incorporated by reference as if fully set forth herein.
FIELD OF THE INVENTION
The present invention relates to a design and implementation of an on-chip i/o-processor and more particularly an i/o-processor supporting different protocols.
DESCRIPTION OF THE PRIOR ART
The main function of a computer involves its CPU and main memory. The CPU fetches instruction and data from the main memory, processes them, and stores the results in the main memory. Other important functions of the computer are the i/o operations (input/output operations). These operations are performed by the i/o system, comprising i/o devices or peripherals, control units for the devices, and software to carry out the i/o operations. The purpose of the i/o system is to transfer information between the main memory or the CPU and the i/o devices.
There are different kinds of prior art i/o systems available, all of which systems utilize the CPU to some extent. If i/o operations are completely controlled by the CPU the system is usually called a programmed i/o system. Programmed i/o can be implemented with very little dedicated i/o hardware. However, a programmed i/o system often suffers from spending a great deal of time performing trivial i/o operations.
Other computer systems are provided with DMA (direct memory access). DMA requires some additional hardware, such as a DMA controller. In these systems the CPU is still responsible for initiating block transfers, while the DMA
35
system carries out the transfers without CPU interventions.
In some prior art systems the i/o device or its controller is provided with additional circuits for performing service request, or interrupt, from the CPU. The interrupt capability frees the CPU from polling i/o device status. Contrary to a DMA request, an interrupt causes the CPU to switch programs by saving the state of its current program and “jumping” to an interrupt handling program. When the interrupt is completed the CPU can resume execution of the interrupted program.
A further step towards complete control of i/o operations is obtained by using an i/o-processor. Like a DMA controller, an i/o-processor has direct access to main memory and can interrupt the CPU. However, it can also execute programs directly. These so called i/o-programs can use an instruction set different from that of the CPU.
In prior art i/o systems the CPU and its memory are connected to channels or i/o-processors. Each i/o-processor can accommodate a number of peripheral device controllers, each controller controlling one or more identical, or similar, devices such as line printers, laser printers, disks, CD-ROM disks etc.
SUMMARY OF THE INVENTION
The present invention is directed to an improved input-output control system, supporting different protocols. This is accomplished by providing a multi protocol supporting i/o-processor according to claim
1
.
It is an object of the present invention to provide an i/o-processor, which replaces a number of dedicated i/o controllers.
Further, it is an object of the invention to provide an i/o-processor compatible with different CPUs.
Another object of the invention is to provide a flexible i/o-processor with the ability to change i/o protocol without any hardware re-design.
Still another object of the invention is to provide an i/o-processor providing shared pin for different protocols.
Another further object of the invention is to provide an i/o-processor enabling a very short design time for a new protocol.
It is also an object of the invention to provide a simple i/o-processor running at a high clock frequency.
Further, it is an object of the present invention to provide a very flexible interface from the i/o-processor to the pins on the chip, i.e. the pins should not have a fixed dedication to a specific protocol.
Thus, an advantage of the processor based implementation according to the invention is that the processor design is much more re-usable and allows for short design time for a new protocol.
REFERENCES:
patent: 5423014 (1995-06-01), Hinton et al.
patent: 5426759 (1995-06-01), Padgaonkar
patent: 5535417 (1996-07-01), Baji et al.
Nilsson Mikael
Oxenholt Jonas
Ranerup Kenny
Sandström Stefan
Axis AB
Cary & Kelly LLP
Lee Thomas C.
Perveen Rehana
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