On-chip failure analysis circuit and on-chip failure...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment

Reexamination Certificate

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C714S723000

Reexamination Certificate

active

08037376

ABSTRACT:
An on-chip failure analysis circuit for analyzing a memory has a memory in which data is stored, a built-in self test unit which tests the memory, a failure detection unit which detects a failure of the output of the memory, a fail data storage unit in which fail data is stored, the fail data including a location of the failure, a failure analysis unit which performs failure analysis using the number of failures detected by the failure detection unit and the location of the failure, the failure analysis unit writing fail data including the analysis result in the fail data storage unit, and an analysis result output unit which outputs the analysis result of the failure analysis unit.

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Chen, J.T. et al, “Test Response Compression and Bitmap Encoding for Embedded Memories in Manufacturing Process Monitoring” International Test Conf. 2001.

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