On chip error detection circuit

Details On chip error detection circuit On chip error detection circuit

1995-06-07

1996-10-15

Tran, Toan

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327 81, 327143, G01R 1900, H03L 700

Patent

active

055657990

ABSTRACT:
A memory cell system is disclosed with properties of asymmetrical operation such that the occurrence of memory error due to certain environmental disturbances is detectable. The asymmetry of operation can be adjusted to set the level at which the disturbance is detected. Detection of memory error in the system can be used to shut off access to an associated memory array in order to prevent error in the array.

REFERENCES:
patent: 4142118 (1979-02-01), Guritz
patent: 4309627 (1982-01-01), Tabata
patent: 4789825 (1988-12-01), Carelli et al.
patent: 5144159 (1992-09-01), Frisch et al.
patent: 5329171 (1994-07-01), Shimizu et al.
patent: 5343086 (1994-08-01), Fung et al.
patent: 5469081 (1995-11-01), Horita et al.

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