Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-12-06
2005-12-06
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S027000, C703S028000
Reexamination Certificate
active
06973591
ABSTRACT:
A debugging system comprising a host computer system and a target device, said target device having an embedded digital processor on an integrated circuit chip, an on-chip emulation device coupled to said digital processor, the on-chip emulation device being operable to control said digital processor and to collect information about the operation of said digital processor, the on-chip emulation device having a communication port operable to receive information from and emit information to the host computer system wherein said debugging system further comprises an interface on said integrated circuit chip having a first port connected to said communication port of said on-chip emulation device and a second port connected to a universal serial bus, said host computer system having a universal serial bus port connected to said universal serial bus wherein said host computer system comprises a proxy server program for managing the universal serial bus port to enable communication over said universal serial bus, and said host computer further comprises application software in use communicating with the proxy server program and hence via said universal serial bus, with the or each digital processor.
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Beausoliel Robert
Jorgenson Lisa K.
McCarthy Christopher
Morris James H.
STMicroelectronics Limited
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