On-chip decoupling capacitor structures

Details On-chip decoupling capacitor structures On-chip decoupling capacitor structures

2011-06-28

2011-06-28

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S300000, C257S301000, C257S302000, C257S303000, C257S304000, C257S305000, C257S306000, C257S308000, C257S309000, C257S532000, C257S535000, C257S750000, C257SE23142, C257SE23144, C257SE23145, C257SE27092, C361S306300

Reexamination Certificate

active

07968929

ABSTRACT:
The present disclosure provides on-chip decoupling capacitor structures having trench capacitors integrated with a passive capacitor formed in the back-end-of-line wiring to provide an improved overall capacitance density. In some embodiments, the structure includes at least one deep trench capacitor and a passive capacitor formed in at least two back-end-of-line wiring levels. The trench and passive capacitors are in electrical communication through one of the wiring levels. In other embodiments, the structure includes at least one deep trench capacitor, a first back-end-of-line wiring level, and a second back-end-of-line wiring level. The deep trench capacitor with a dielectric that has an upper edge that terminates at a lower surface of a shallow trench isolation region. The first wiring level is in electrical communication with the trench capacitor. The second wiring level is vertically electrically connected to the first wiring level by vertical connectors so as to form a passive capacitor.

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