Offset vertical device

Details Offset vertical device Offset vertical device

2007-07-24

2007-07-24

Landau, Matthew C. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S301000, C257SE27096, C257SE27095

Reexamination Certificate

active

10813352

ABSTRACT:
The present invention includes a method for forming a memory array and the memory array produced therefrom. Specifically, the memory array includes at least one first-type memory device, each of the at least one first-type memory device comprising a first transistor and a first underlying capacitor that are in electrical contact to each other through a first buried strap, where the first buried strap positioned on a first collar region; and at least one second-type memory cell, where each of the at least are second-type memory device comprises a second transistor and a second underlying capacitor that are in electrical contact through an offset buried strap, where the offset buried strap is positioned on a second collar region, wherein the second collar region has a length equal to the first collar region.

REFERENCES:
patent: 6214686 (2001-04-01), Divakaruni et al.
patent: 6387773 (2002-05-01), Engelhardt
patent: 6570207 (2003-05-01), Hsu et al.
patent: 6605838 (2003-08-01), Mandelman et al.
patent: 2003/0132438 (2003-07-01), Jang
patent: 2005/0190590 (2005-09-01), Chen et al.

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