Offset error compensation for integrating analog-to-digital conv

Communications: electrical – Audible indication – Percussion-type sound producer

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340347AD, 340347CC, H03K 1320

Patent

active

039421732

ABSTRACT:
An analog-to-digital converter of the ramp-integrator type utilizing a special technique to reduce errors due to offset voltages. In a pre-conversion cycle, the integrator first is ramped away from a datum level and then back to that level, by sequential application of opposite-polarity reference signals. A digital net offset error is thereby determined as the difference in clock time between (a) the total time of ramp-up-and-back and (b) a fixed time period set by a clock generator. During the subsequent conversion cycle, the integrator is ramped up by the unknown analog signal and then is ramped back by a reference signal. The time of ramp-up is controlled in accordance with the amount of previously-determined net offset error so as to provide error correction.
In the embodiment disclosed, the ramp-up time during the pre-conversion cycle is set at k/2 clock pulses, and the digital offset error is the difference in clock pulse time between the return to datum level and a fixed time of k clock pulses. The ramp-up time during the conversion cycle is terminated at 2k clock pulses following start of the pre-conversion cycle, so that the integration time is set at k-n clock pulses where n is the digital error in clock pulses determined in the pre-conversion cycle. The digital output signal is defined as the number of clock pulses between the final return to datum level and the time of 2k of clock pulses following the start of the conversion cycle.

REFERENCES:
patent: 3828347 (1974-08-01), Sacks

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