Offset-bonded, multi-chip semiconductor device

Details Offset-bonded, multi-chip semiconductor device Offset-bonded, multi-chip semiconductor device

2006-12-05

2006-12-05

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Chip mounted on chip

C257S685000, C257S686000, C257S723000, C257S775000, C257SE21027, C257SE23085, C257SE25006

Reexamination Certificate

active

07145247

ABSTRACT:
The present invention is aimed at bonding a lower chip and an upper chip through bumps in a highly reliable manner, while ensuring a sufficient area for an external connection terminal region, by offsetting the upper chip to the lower chip. The substrate2has bumps1arranged on one surface thereof, and has a first chip3mounted on the other surface thereof. A second chip4is bonded to the first chip3through bumps5, 6while offsetting the second chip4to the first chip3in parallel. In the bonded state of the first chip3and the second chip4,a part of the first chip3and a part of the second chip4are overlapped without aligning the centers of the both. The center of gravity of the second chip4falls inside a region surrounded by the outermost bumps between the first chip3and the second chip4.

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patent: WO 02/103793 (2002-12-01), None
German Office Action dated Jan. 26, 2006, with English translation.

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