Off-width pitch for improved circuit card routing

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C257S773000

Reexamination Certificate

active

10991360

ABSTRACT:
Enlarged spacing is provided between rows of vias in a ball grid array (BGA) multilayered printed wiring board land pattern in which the lands in the pattern are connected to the vias by a link connector by rotating, elongating, and/or truncating selected consecutive link connectors and rotating their respective corresponding vias in a row or column or selected consecutive rows or columns to achieve the enlarged spacing between rows or columns of vias in the BGA land pattern. Enhanced spacing between selected grid columns or rows of vias is provided such that some of the grid pitches for the vias are equal to that of the standard BGA and at least some are of a greater grid pitch.

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patent: 6160715 (2000-12-01), Degani et al.
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patent: 2003/0183419 (2003-10-01), Miller et al.
patent: 2004/0164427 (2004-08-01), Seaman et al.
patent: 2005/0044517 (2005-02-01), Seaman et al.

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