Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2011-01-11
2011-01-11
Le, Don P (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S021000
Reexamination Certificate
active
07868651
ABSTRACT:
Off-die termination of memory module signal lines in a computer memory subsystem. The computer memory subsystem includes a memory controller and a DIMM socket installed on a PCB. The memory controller is electrically coupled to the DIMM socket via a memory module signal line. Off-die termination includes detecting, by a termination controller installed on the PCB, no presence of a DIMM in the DIMM socket and, responsive to the detection, activating, by the termination controller, an off-die termination component on the PCB to terminate the memory module signal line.
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Cases Moises
Mutnury Bhyrav M.
Pham Nam H.
Biggers & Ohanian LLP
International Business Machines - Corporation
Le Don P
Lenart Edward J.
Tyson Tom
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