Off-chip memory allocation for a unified shader

Details Off-chip memory allocation for a unified shader Off-chip memory allocation for a unified shader

2009-05-01

2010-06-15

Thai, Tuan V. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

C711S100000, C711S154000

Reexamination Certificate

active

07739473

ABSTRACT:
Systems and methods for dynamically allocating memory for thread processing may reduce memory requirements while maintaining thread processing parallelism. A memory pool is allocated to store data for processing multiple threads that does not need to be large enough to dedicate a fixed size portion of the memory pool to each thread that may be processed in parallel. Fixed size portions of the memory pool are dynamically allocated and deallocated to each processing thread. Different fixed size portions may be used for different types of threads to allow greater thread parallelism compared with a system that requires allocating a single fixed portion of the memory pool to each thread. The memory pool may be shared between all of the thread types or divided to provide separate memory pools dedicated to each particular thread type.

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Notice of Allowance, U.S. Appl. No. 11/382,907, dated Jan. 9, 2009.

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