Off-chip driver circuits

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307475, 307568, H03K 19003, H03K 19094

Patent

active

047091622

ABSTRACT:
An off-chip driver circuit is provided which includes a pull-up device disposed between an output terminal and a first voltage dropping diode which is connected to a first voltage supply source and a first voltage limiting circuit connected to the common point between the pull-up device and the voltage dropping diode. The off-chip driver circuit further includes an input inverter circuit having an output connected to the control element of the pull-up device. The inverter circuit has a P-channel field effect transistor and an N-channel field effect transistor serially connected with a second voltage dropping diode which is connected to the first voltage supply source and a second voltage limiting circuit connected to the common point between the second voltage dropping diode and the P-channel field effect transistor of the input inverter. First and second switches are also provided to short out the first and second voltage dropping diodes, respectively, when all circuits connected to the output terminal use a common voltage supply. A pull-down device serially connected to a pass device is provided between the output terminal and a point of reference potential. A buffer circuit having an output connected to the pull-down device is coupled to a second voltage supply source having a voltage significantly lower than the voltage of the first voltage supply source.

REFERENCES:
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patent: 4481432 (1984-11-01), Davies, Jr.
patent: 4518873 (1985-05-01), Suzuki et al.
patent: 4536665 (1985-08-01), Dayton
Furuyama, Tohru, et al, "An Experimental 4Mb CMOS DRAM", ISSCC Digest of Technical Papers, pp. 272-273, Feb. 1986.

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