Obscuring memory access patterns

Details Obscuring memory access patterns Obscuring memory access patterns

2006-12-27

2009-10-27

Kim, Matt (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000, C711S144000, C711S145000, C726S022000

Reexamination Certificate

active

07610448

ABSTRACT:
For each memory location in a set of memory locations associated with a thread, setting an indication associated with the memory location to request a signal if data from the memory location is evicted from a cache; and in response to the signal, reloading the set of memory locations into the cache.

REFERENCES:
patent: 6026471 (2000-02-01), Goodnow et al.
patent: 6418542 (2002-07-01), Yeager
patent: 2003/0225976 (2003-12-01), Hokenek et al.
patent: 2007/0043916 (2007-02-01), Aguilar, Jr. et al.
patent: 2007/0277001 (2007-11-01), Mevergnies et al.
patent: 1 347 384 (2003-09-01), None
patent: 2 434 892 (2007-08-01), None
patent: WO 03/054693 (2003-07-01), None
EPO, European Application No. 07254933.0—1229 / 1939752, mailed Jan. 16, 2009, 6 pages.
EPO, European Application No. 07254933.0, dated Jul. 7, 2008, 1 page.
European Search Report dated May 28, 2008 for EP application No. 07254933.0. 5 pages.

Affiliated with

Also associated with

Rating

Obscuring memory access patterns does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Obscuring memory access patterns, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Obscuring memory access patterns will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4136300