NOR-type mask ROM having dual sense current paths

Details NOR-type mask ROM having dual sense current paths NOR-type mask ROM having dual sense current paths

1997-10-21

1999-07-13

Fears, Terrell W.

Static information storage and retrieval

Addressing

Plural blocks or banks

36518903, G11C 1300

Patent

active

059236060

ABSTRACT:
A NOR-type mask ROM reduces the resistance ratio of buried diffusion layers and improves the drive capacity of bank selection transistors by utilizing sub-bit line selection transistors located near the center of a memory cell array. The sub-bit line selection transistors are connected to a pair of sub-bank selection lines that divide the memory cell array into symmetric upper and lower portions. The bank selection transistors couple alternate sub-bit lines to main bit lines at both ends of the sub-bit lines, thereby forming a dual current path between the main bit lines and the memory cells coupled to the sub-bit lines.

REFERENCES:
patent: 5499216 (1996-03-01), Yamamoto

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