NOR-type hybrid multi-bit non-volatile memory device and...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S158000, C365S163000, C365S148000

Reexamination Certificate

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07492635

ABSTRACT:
A hybrid multi-bit memory device may include a plurality of unit cells arranged in a matrix of a plurality of rows and columns. Each of the unit cells may include a first memory unit and a second memory unit. The first and second memory unit may share a source and a drain. The first memory unit of each unit cell arranged in each row may be connected to one of a plurality of word lines, and the drain of each unit cell arranged in each column may be connected to one of a plurality of bit lines.

REFERENCES:
patent: 5784325 (1998-07-01), Arase et al.
patent: 6069381 (2000-05-01), Black et al.
patent: 6225168 (2001-05-01), Gardner et al.
patent: 6490194 (2002-12-01), Hoenigschmid
patent: 7276758 (2007-10-01), Kim
patent: 2005-005569 (2005-01-01), None
Office Action for corresponding Korean Application No. 10-2005-0001141 dated Jul. 5, 2006 and English translation thereof.

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