Nor-type channel-program channel-erase contactless flash...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S318000, C257SE27103, C257SE27112, C365S185240, C365S185180

Reexamination Certificate

active

07495283

ABSTRACT:
A semiconductor device having an electrically erasable programmable read only memory (EEPROM) comprises a contactless array of EEPROM memory cells disposed in rows and columns and constructed over a silicon-on-insulator wafer. Each EEPROM memory cell comprises a drain region, a source region, a gate region, and a body region. The semiconductor device further comprises a plurality of gate lines each connecting the gate regions of a row of EEPROM memory cells, a plurality of body lines each connecting the body regions of a column of EEPROM memory cells, a plurality of source lines each connecting the source regions of a column of EEPROM memory cells, and a plurality of drain lines each connecting the drain regions of a column of EEPROM memory cells. The source lines and the drain lines are buried lines, and the source regions and the drain regions of a column of EEPROM memory cells are insulated from the source regions and the drain regions of the adjacent columns of EEPROM memory cells.

REFERENCES:
patent: 5796142 (1998-08-01), Lin et al.
patent: 5885868 (1999-03-01), Lin et al.
patent: 5995412 (1999-11-01), Ohta
patent: 6226198 (2001-05-01), Miwa et al.
patent: 6438030 (2002-08-01), Hu et al.
patent: 6498752 (2002-12-01), Hsu et al.
D. Burnett, et al., “An Advanved Flash Memory Technology on SOI”, IEDM Tech. Digest, pp. 983-986, 1998.
K. S. Kim, et. al., “A Novel Dual String NOR (DuSNOR) Memory Cell Technology Scalable to the 256 Mbit and 1 Gbit Flash Memories”, IEDM Tech. Digest, pp. 263-266, 1995.
Y. Yamauchi, et al., “A New Cell Structure for Sub-quarter Micron High Density Flash Memory”, IEDM Tech. Digest, pp. 267-270, 1995.
S. Aritome, et al., “A Reliable Bi-polarity Write/Erase Technology in Flash EEPROMs”, IEDM Tech. Digest, pp. 111-114, 1990.

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