NOR flash memory device with multi level cell and read...

Details NOR flash memory device with multi level cell and read... NOR flash memory device with multi level cell and read...

2008-04-01

2008-04-01

Tran, Michael T (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185330

Reexamination Certificate

active

07352623

ABSTRACT:
A NOR flash memory device includes a multi level memory cell coupled to a bit line configured to be sensed in response to a word line voltage, and a discharge circuit configured to discharge the bit line when the multi level memory cell is sensed as an on cell.

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patent: 2004/0174741 (2004-09-01), Tanaka
patent: 2005/0286285 (2005-12-01), Lee et al.
patent: 2006/0215453 (2006-09-01), Seong
patent: 07-037393 (1995-02-01), None
patent: 2003-022683 (2003-01-01), None
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patent: 2003-0002730 (2003-01-01), None
English language abstract of Korean Publication No. 2000-0061557.
English language abstract of Koran Publication No. 2003-0002730.
English language abstract of Japanese Publication No. 07-037393.
English language abstract of Japanese Publication No. 2003-022683.

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