NOR flash memory cell with high storage density

Details NOR flash memory cell with high storage density NOR flash memory cell with high storage density

2006-02-07

2006-02-07

Elms, Richard (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185280, C365S185330

Reexamination Certificate

active

06996009

ABSTRACT:
Structures and methods for NOR flash memory cells, arrays and systems are provided. The NOR flash memory cell includes a vertical floating gate transistor extending outwardly from a substrate. The floating gate transistor having a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain regions, a floating gate separated from the channel region by a gate insulator, and a control gate separated from the floating gate by a gate dielectric. A sourceline is formed in a trench adjacent to the vertical floating gate transistor and coupled to the first source/drain region. A transmission line coupled to the second source/drain region. And, a wordline is coupled to the control gate perpendicular to the sourceline.

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