Nonvolatile storage apparatus with folded bit line structure

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365203, 365205, 365190, 36518512, G11C 700

Patent

active

054596947

ABSTRACT:
A semiconductor nonvolatile memory device which can adopt a folded bit line system and can achieve an enhancement of speed of the read out time etc., which device adopting a differential type sensing system comprising a bit line BL and an inverted bit line BL.sub.-- connected in parallel to a sense amplifier SA.sub.f, wherein provision is made of a first memory cell MC1 connected to a word line WL and the bit line BL; a second memory cell MC2 connected to the word line WL which is common also for the first memory cell MC1, and, connected to the inverted bit line BL.sub.-- ; and a circuit BVA which retains the potential of either one of bit lines of the bit line BL and the inverted bit line BL.sub.-- at the first potential at the time of a read out operation, and, sets the potential of the other bit line at the second potential made to have a difference from the first potential for a predetermined time.

REFERENCES:
patent: 5022009 (1991-06-01), Terada
patent: 5043942 (1991-08-01), Iwata
patent: 5184324 (1993-02-01), Ohta

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