Nonvolatile solid-state memory device using magnetoresistive...

Details Nonvolatile solid-state memory device using magnetoresistive... Nonvolatile solid-state memory device using magnetoresistive...

2001-09-27

2002-11-26

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S173000, C365S171000, C365S051000, C365S066000, C365S063000, C365S209000, C365S207000

Reexamination Certificate

active

06487110

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a nonvolatile solid-state memory device and memory using a magnetoresistive film, and a recording/reproducing method of the memory device and memory.
2. Related Background Art
A Magnetic Random Access Memory (MRAM) is a solid-state memory having no active portion similar to a semiconductor memory. Compared to a semiconductor memory, however, this magnetic thin-film memory has advantages that no information is lost even when the power supply is shut down, data can be repetitively rewritten an unlimited number of times, and no recorded contents disappear even upon incidence of radiation. In particular, a magnetic thin-film memory using a spin tunnel effect (TMR) has attracted attention because of its high output, compared to conventionally provided magnetic thin-film memories using an anisotropic magnetoresistive effect and a spin scattering type giant magnetoresistive effect (GMR).
For example, U.S. Pat. No. 5,940,319 discloses the structure of a device in which a memory cell is formed by connecting a transistor and a magnetoresistive element which is magnetized in the plane of the film, as shown in FIG.
1
. This device is formed by a process shown in
FIGS. 3
to
7
.
First, a field-effect transistor (MOSFET) is fabricated by a CMOS process by forming a source region
2
, a drain region
3
, a LOCOS oxide film
11
, a gate electrode
4
, a source electrode
12
, and a plug electrode
5
on a p-type Si substrate
1
(FIG.
3
). After an insulating film is formed and patterned, write lines
10
are buried and planarized by CMP (FIG.
4
). A lower electrode
14
of a magnetoresistive film is formed and planarized by CMP (FIG.
5
), and a magnetoresistive film
9
is formed (FIG.
6
). After that, this magnetoresistive film
9
and the lower electrode
14
are processed (FIG.
7
), an insulating film is formed, and a bit line (upper electrode)
6
is formed to complete the device (FIG.
1
).
To detect the resistive value of the magnetoresistive film, an electric current is supplied in a direction perpendicular to the film plane so that the current flows through a tunnel barrier film. Since an MRAM generally uses an in-plane magnetization film as the magnetoresistive film, the write lines
10
must be arranged below or above the magnetic film. For example, the write lines
10
are arranged below the magnetoresistive film
9
in FIG.
1
. Accordingly, the lower electrode
14
and the insulating film are interposed between the write lines and the magnetoresistive film. Additionally, to connect the lower electrode
14
to the drain region
3
of the field-effect transistor, the magnetoresistive film must be formed in a place shifted sideways from the drain region.
This poses the following problems.
First, when the magnetoresistive film and the lower electrode are patterned (FIGS.
6
and
7
), it is necessary to form a region in which the magnetoresistive film is removed and the lower electrode is not entirely removed but partially left behind. In this etching step, a film which produces any extra resistance cannot be inserted between the magnetic film and the lower electrode, because both the magnetic film and the lower electrode are metals. This makes it difficult to stop the etching at appropriate positions uniformly on the wafer.
Second, since it is necessary to selectively form a portion where both the magnetoresistive film and the lower electrode are removed and a portion where the lower electrode is left behind, the number of mask steps increases to complicate the process.
Third, both the insulating film and the lower electrode exist between the magnetoresistive film and the write lines. This increases the distance between the magnetoresistive film and the write lines and thereby prevents efficient application of a generated magnetic field from the write lines to the magnetoresistive film. In addition, the lower electrode must be thick since etching stop position variations during the process must be taken into consideration and it is necessary to prevent disconnection even when a repetitive electric current is supplied. This makes shortening of the distance and consequently miniaturization of the memory device difficult.
Fourth, the plug electrode
5
is formed on the drain region
3
with a certain positional deviation margin. Therefore, the device must be designed with an extra margin, and this makes the cell area difficult to reduce.
In addition to these problems, when an in-plane magnetization film is used as the magnetic film, a demagnetizing field (self-demagnetizing field) generated inside the magnetic layer becomes no longer negligible as the area of a bit cell is decreased, so the magnetization direction in the magnetic layer for recording is not fixed in one direction but becomes unstable. Accordingly, the information storage stability of the conventional magnetic thin-film memory lowers as the degree of microfabrication of bit cells increases, and this makes memory devices difficult to miniaturize. This is particularly significant when the size is 1 &mgr;m or less. In an in-plane magnetization film, therefore, the length in the direction of the axis of easy magnetization must be twice or more, and in practice about four times the width of the film.
FIG. 2
shows a structure in which a memory cell having the arrangement shown in
FIG. 1
is viewed from above. As shown in
FIG. 2
, minimum dimensions of the cell are 3F (F is a minimum fabrication dimension) in width and 3F to 5F in the write line direction. Even when the alignment margin is completely ignored, the cell area is as large as 9×F
2
to 15×F
2
. Referring to
FIG. 1
, the source electrode
12
is shared by adjacent cells. If this sharing is not performed, however, the cell width becomes 4F, and this further increases the cell area to 12×F
2
or more. Accordingly, high integration is difficult to perform.
SUMMARY OF THE INVENTION
As described above, in an MRAM having a difficult fabrication process, the device structure makes it difficult to decrease the cell area and increase the degree of integration.
The present invention has been made in consideration of the above situation, and has as its object to realize an MRAM which can achieve a high integration degree without complicating the fabrication process.
The above object is achieved by a memory comprising a substrate, a magnetoresistive element which is formed on the substrate and has a structure in which first and second magnetic layers are stacked, and a nonmagnetic layer is sandwiched between the first and second magnetic layers, a bit line formed on a side of the magnetoresistive element away from a side opposing the substrate, and a write line which changes a magnetization direction in the first or second magnetic layers by a magnetic field generated by an electric current, and a transistor, wherein the magnetoresistive element is formed immediately above a drain region of the transistor.
The above object is achieved by a memory in which the axis of easy magnetization of the first and/or second magnetic film is perpendicular to the film plane.
The above object is achieved by a memory in which the nonmagnetic layer is an insulator.
The above object is achieved by a memory in which the magnetoresistive effect elements are formed in a matrix on the substrate.
The above object is achieved by a memory in which a drain electrode occupies for 50% or more of the area of the drain region.
The above object is achieved by a memory in which the write line is formed closer to the substrate than the magnetoresistive effect element.
The above object is achieved by a memory in which the magnetoresistive effect element is formed after the transistor and the write line are formed on the substrate.
The above object is achieved by a memory in which the write line is formed, via an insulating layer, on an element isolation region or on a gate electrode of a transistor formed on a silicon substrate.
The above object is achieved by a memory in which a ground electro

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