Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2002-04-02
2004-04-20
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S171000, C365S173000
Reexamination Certificate
active
06724651
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory for storing information, and particularly to a nonvolatile memory using a magnetic material, and a method of driving the same.
2. Description of the Related Art
Magnetic materials such as ferromagnetic materials and ferrimagnetic materials have the property that magnetization produced in a magnetic material by an external magnetic field remains after the external magnetic field is removed. The magnetization remaining in the magnetic material is referred to as “residual magnetization”. Also, the electric resistance of a magnetic material changes with the direction of magnetization and the presence of magnetization. This is referred to as a “magnetoresistance effect”, and the rate of change in the electric resistance value is referred to as a “magnetoresistance ratio (MR ratio)”. Materials having a high magnetoresistance ratio include giant magnetoresistance (GMR) materials, colossal magnetoresistance (CMR) materials, and the like. These materials include metals, alloys, compound oxides, and the like. Examples of these materials include transition metals and rare earth metals such as Fe, Ni, Co, Gd, Tb, and the like; alloys thereof; compound oxides such as La
x
Sr
1-x
MnO
9
, La
x
Ca
1-x
MnO
9
, and the like.
By selecting the electric resistance value according to the direction and presence of residual magnetization of a magnetoresistance material, a nonvolatile memory for storing information as an electric resistance value can be formed. Such a nonvolatile memory is referred to as “MRAM” (Magnetic Random Access Memory).
Many MRAMs, which have recently been in progress of development, have a structure in which a magnetoresistive element comprising a nonmagnetic layer sandwiched between magnetic layers is used as a memory element. The MRAMs also use a system in which a change in electric resistance produced by a difference between the magnetization directions of both magnetic layers is converted to a voltage to read stored information. Also, the magnetization direction of a memory cell is changed by a magnetic field induced by passing a current through a write line to permit writing or rewriting of information.
The cell structure and driving method of an MRAM are disclosed in, for example, R. E. Scheuerlein (1998, Proc. of Int. Nonvolatile Memory Conf., P47). In this publication, a memory (matrix type) comprising memory cells each comprising a giant magnetoresistive thin film and a pair of crossed write lines and a pair of crossed readout lines or a pair of crossed wirings used as a write line and a readout line, and a diode connected to the memory cell in series is proposed.
The conventional MRAMs use a common method in which when information is written in a selected cell of the cells arranged in a matrix, a current pulse is applied to write wiring connected to the selected cell or adjacent thereto to apply a magnetic field in the direction of easy magnetization of a memory element, changing the magnetization direction of the selected cell.
Furthermore, each time information is written in a selected memory cell, write currents are passed through both the corresponding write line and wiring for producing a memory cell selecting assist magnetic field. Since a pulse is applied to wiring once for writing in each element, a current of several mA to several tens mA is possibly required as a write current. This is a main cause of a significant increase in the power consumption of a conventional MRAM. For example, as disclosed in 2000, Proc. of Int. Solid-State Circuits Conf., P128, a 2T2R-model MRAM chip proposed by IBM requires a current of 16 mA for rewriting information in each cell. As the condition for operating the MRAM chip, a power consumption of 640 mW is required only for passing a write current on the assumption that 32-bit parallel writing is driven by a supply voltage of 2.5 V.
In various technical fields, there has recently been a tendency to decrease the weight, size and power consumption of a memory. Particularly, MRAMs expected to be mounted on various electronic apparatuses have a large problem of power consumption. Particularly, in mounting the MRAM on a mobile apparatus or the like, which is strongly demanded to decrease power consumption, a large write current is a serious problem.
SUMMARY OF THE INVENTION
The present invention has been achieved for solving the problem of the conventional technique, and an object of the present invention is to provide a magnetic memory which can be operated with low power consumption, and a method of driving the same.
In order to achieve the object, in an aspect of the present invention, an MRAM comprises a plurality of memory elements arranged in a matrix so that the electric resistance of each of the memory elements can be switched to a high-resistance state and a low-resistance state by selecting the magnetization direction of a magnetic layer; a plurality of bit lines arranged for the respective rows of the matrix, and a plurality of write lines arranged for the respective columns of the matrix so as to cross the bit lines, ends of the memory elements being connected to any one of the bit lines; wherein information is written in the memory elements arranged in a same row or column by performing once each of the first information writing step of applying a first magnetic field to put the memory elements in the high-resistance state, and the second information writing step of applying a second magnetic field to the memory elements in which the first information has not been written, to write information in all memory elements in the same column under recording of information.
In another aspect of the present invention, an MRAM comprises a plurality of memory cells each comprising a magnetoresistive element as a memory element having a structure in which a nonmagnetic layer is sandwiched by magnetic layers; a plurality of first wirings for applying a magnetic field in the direction of easy magnetization of the magnetic layers; and a plurality of second wirings for applying a magnetic field in a direction inclined from the direction of easy magnetization of the magnetic layers, the memory cells being arranged in a matrix; wherein a current is passed through one of the second wirings to apply a magnetic field to all memory elements arranged in a same row or column of the rows or columns of a plurality of memory cells arranged in parallel with the second wirings, and a current is passed through each of the plurality of first wirings in a direction according to the information to be recorded in each of the memory elements synchronously with the current pulse passed through the second wiring to apply a magnetic field to each of the magnetoresistive elements, thereby recording information on the plurality of memory elements arranged in a same row or column.
Further objects, features and advantages of the present invention will become apparent from the following description of the preferred embodiments with reference to the attached drawings.
REFERENCES:
patent: 6515896 (2003-02-01), Tran
patent: 6522573 (2003-02-01), Saito et al.
patent: 2001/0038548 (2001-11-01), Perner et al.
R.E. Scheuerlein, “Magneto-Resistive IC Memory Limitations and Architecture Implications”, Proc. Of Int'l NonValatile Memory Technology Conference., 1998, pp. 47-50.
Canon Kabushiki Kaisha
Hoang Huan
LandOfFree
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