Nonvolatile semiconductor system

Details Nonvolatile semiconductor system Nonvolatile semiconductor system

1995-02-15

1995-10-31

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Differential sensing

365184, 36518524, 36518526, G11C 702, G11C 1606

Patent

active

054635870

ABSTRACT:
It is an object of the present invention to optimize the range of threshold voltage in a flash EEPROM and to simplify the verifying operation. In memory transistors (1)-(4) and a dummy memory transistor (5), erasing operation can be performed by setting a source lines SL and a dummy source line DSL at Vpp-level and Vpp1-level, respectively and by setting word lines WL1, WL2 and a dummy word line DWL at GND level. As the erasing process proceeds, the threshold voltage in the dummy memory transistor (5) is reduced before the threshold voltages in the memory transistors (1)-(4) are reduced. Therefore, the verifying operation can be executed by only detecting the threshold voltage in the dummy memory transistor. In addition, the overerasing can be prevented by previously detecting the threshold voltage in the dummy memory transistor.

REFERENCES:
patent: 4956816 (1990-09-01), Atsumi et al.
patent: 5142496 (1992-08-01), Van Buskirk

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