Static information storage and retrieval – Read/write circuit – Simultaneous operations
Reexamination Certificate
2002-01-11
2004-01-20
Le, Thong (Department: 2818)
Static information storage and retrieval
Read/write circuit
Simultaneous operations
C365S233100
Reexamination Certificate
active
06680868
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a nonvolatile semiconductor storage device and its control method, and in particular relates to a nonvolatile semiconductor storage device which enables electric writing and erasing of data and its control method.
(2) Description of the Prior Art
Conventionally, in the access scheme for nonvolatile semiconductor storage devices enabling electric writing and erasing of data, typically represented by flash memories, data reading is performed by using a dedicated control terminal or terminals, as is performed by a volatile memory such as a DRAM (Dynamic Random Access Memory) and SRAM (Static Random Access Memory) or a non-volatile memory such as ROM (Read only Memory). On the other hand, concerning data writing and erasing of memory cells, usually no dedicated control terminal is provided, but commands indicating data writing and erasing operations are input externally to perform the necessary operation, instead.
Such a data erasing and programming (data writing) method based on command control for use in an electrically rewritable and erasable nonvolatile semiconductor storage device has been disclosed in detail by Japanese Patent Publication Hei 6 No.32226.
As in Japanese Patent Publication Hei 6 No.32226, an input command is usually constructed of multiple cycles accompanying activation of each chip enable signal, such as set-up erase and erase commands.
Referring now to
FIG. 1
, circuit blocks in a typical nonvolatile semiconductor storage device will be described.
FIG. 2
shows a flowchart for illustrating the internal operation of this circuit configuration when write operations are performed in succession. The nonvolatile semiconductor storage device shown in
FIG. 1
has the same structure as that of the nonvolatile semiconductor storage device according to the first embodiment of the present invention to be detailed hereinbelow.
In
FIG. 2
, though only data write operations are described, the internal operation when a data erase operation is performed is equivalent to that shown in
FIG. 2
except that ‘write’ is replaced by ‘erase’.
As shown in
FIG. 1
, the conventional nonvolatile semiconductor storage device is comprised of a nonvolatile memory cell array
10
made up of a multiple number of memory cell transistors (not shown), a write/erase control circuit
20
, an internal charge pump circuit
30
and a command user interface
40
for interpreting the commands input externally.
Interval charge pump circuit
30
is a circuit which pumps the voltage supplied externally to such a level as to be able to change the threshold of the memory cell transistors in nonvolatile memory cell array
10
(so as to be able to perform data writing or data erasing).
Write/erase control circuit
20
is a circuit for making the write/erase in-process status signal active based on a write/erase command input signal through command user interface
40
so as to indicate that a write operation or erase operation has started (has been in progress) and actuating the operation of internal charge pump circuit
30
by making active the actuating signal to internal charge pump circuit
30
in order to obtain the necessary voltage for implementing the write/erase operation of the memory cell (for changing the threshold of the memory cell transistor).
Write/erase control circuit
20
, in response to the pumping-complete signal from internal charge pump circuit
30
, performs the write/erase operation to nonvolatile memory cell array
10
, using the pumping write/erase voltage. When a write/erase operation has been completed, the actuating signal for internal charge pump circuit
30
output from write/erase control circuit
20
is made inactive so as to stop the operation of internal charge pump circuit
30
while the write/erase in-process status signal is made inactive to thereby indicate that the write or erase operation has been completed.
In the nonvolatile semiconductor storage device having the above circuit configuration, once a write command is input to the nonvolatile semiconductor storage device (S
1
), write/erase control circuit
20
turns on internal charge pump circuit
30
(S
2
), as shown in FIG.
2
.
Then, internal charge pump circuit
30
starts the pumping operation and continues it until the pumping reaches a specified voltage (S
3
). When the specified voltage has been reached, the pumping-complete signal is returned to write/erase control circuit
20
(S
4
).
Subsequently, write/erase control circuit
20
implements writing of data into nonvolatile memory cell array
10
, using the pumping voltage (S
5
).
When the write operation has been completed, internal charge pump circuit
30
is turned off (S
6
). That is, the pumping voltage is reduced and the waiting mode is restored so as to be able to accept a new command to implement (S
7
).
When another write command is input in succession, the same operation will be started once again (S
1
to S
7
).
Up to now, the internal operation for data writing has been described, but the internal operation for data erasing is also performed in the same sequence as above. In this case, the internal operation for data erasing is equivalent to that shown in
FIG. 2
where ‘write’ is replaced by ‘erase’.
Since the conventional nonvolatile semiconductor storage device is thus configured, it includes the following problems.
In the conventional nonvolatile semiconductor storage device, if write commands or erase commands are input in succession, internal charge pump circuit
30
performs the pumping-off operation every end of write or erase operation. This is because the conventional nonvolatile semiconductor storage device has no means for distinguishing the relationship between the command being currently implemented and the command to be input next. Further, since a different pumping voltage is needed for a different command, the charge pump circuit needs to be initialized in preparation for a next input of a different command.
Incidentally, nonvolatile semiconductor storage devices, typified by flash memories, have usually been used as rewritable read only memory after they have been mounted on product boards. Therefore, the above configuration did not pose any inconvenience.
However, with the recent development of flash memories into large capacities, their improvement in reliability and the broadening of their application fields, the nonvolatile semiconductor storage devices have become used for data recording purposes involving filesystems, which need frequent write and erase operations, similarly to the way the magnetic storage devices are used. Further, since the data to be handled by nonvolatile semiconductor storage devices has become large in scale, as typified by audio data, write and erase operations have become more frequently implemented in succession.
For the above reasons, the redundancy of operations when write or erase commands are input in succession, i.e., restarting pumping after once turning the charge pump circuit off, can be no longer disregarded. More specifically, the control method of the conventional nonvolatile semiconductor storage devices suffers the problem of increased total time for writing or erasing and increased power consumption.
Under such circumstances, there have been demands for a method which is capable of omitting part of the internal operation that becomes redundant when write or erase commands are input in succession, by providing a means of distinguishing the types of commands input in row and hence can reduce the time of write and/or erase operations and cut down the power consumption.
SUMMARY OF THE INVENTION
The present invention has been devised under the above circumstances, it is therefore an object of the present invention to provide a nonvolatile semiconductor storage device and its control method, wherein the time required for write or erase operations to be implemented in succession can be cut down.
In order to achieve the above object, the nonvolatile semiconductor storage device and its control m
Le Thong
Morrison & Foerster / LLP
Sharp Kabushiki Kaisha
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