Nonvolatile semiconductor memory with block erase select means

Details Nonvolatile semiconductor memory with block erase select means Nonvolatile semiconductor memory with block erase select means

1992-12-10

1995-05-23

Clawson, Jr., Joseph E.

Static information storage and retrieval

Floating gate

Particular biasing

36523003, 365218, G11C 1140

Patent

active

054187427

ABSTRACT:
A non-volatile semiconductor memory cell including: a plurality of blocks each having a plurality of floating gate transistors as memory cells, each floating gate transistor having a drain, a source, a floating gate, and a control gate capacitively coupled to the floating gate. The data program of the floating gate transistor is effected by data write through injection of electrons into the floating gate and by data erase through emission of electrons from the floating gates. A circuit unit applies an erase signal to a selected one of the blocks to emit electrons from the floating gates of a plurality of memory cells in the selected block and to erase data in all of the memory cells in the selected block at the same time. A circuit unit applies a write signal to the drains of the floating gate transistors within the selected block, without applying the write signal to the drains of the floating gate transistors of non-selected blocks.

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