Nonvolatile semiconductor memory wherein dummy cells are used fo

Static information storage and retrieval – Read/write circuit – Differential sensing

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36518907, 365203, 365205, G11C 1700

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active

052299686

ABSTRACT:
A semiconductor memory having two memory circuits. In either memory circuit, memory cells and one dummy cell are connected to bit lines, respectively. When data is read from one of the memory cells connected to the bit lines of the first memory circuit, the dummy cell connected to one bit line incorporated in the second memory circuit is selected. Conversely, when data is read from one of the memory cells connected to the bit lines of the second memory circuit, the dummy cell connected to one bit line incorporated in the first memory circuit is selected. In either memory circuit, to read data from one of the memory cells, the selected bit line is precharged. Both the selected memory cell and the selected dummy cell are discharged while the data is being read from the selected memory cell.

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Tadashi Maruyama, et al., "Wide Operating Voltage Range and Low Power Consumption EPROM Structure for Consumer Oriented ASIC Applications", IEEE 1988 Custom Integrated Circuits Conference, pp. 4.1.1-4.1.4, 1988.

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