Nonvolatile semiconductor memory that eases the dielectric stren

Details Nonvolatile semiconductor memory that eases the dielectric stren Nonvolatile semiconductor memory that eases the dielectric stren

1994-12-14

1996-12-03

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257322, 257348, 257371, 257402, H01L 2980, H01L 2702, H01L 2978

Patent

active

055811078

ABSTRACT:
An object of the present invention is to ease the dielectric strength requirements for transistors forming power supply circuits or the like. A nonvolatile semiconductor memory of the present invention includes a plurality of memory cells, each of which is composed of a floating gate, a control gate, a drain, and a source, and a negative voltage generating means whose generated negative voltage is applied to the control gate for drawing a charge stored in the floating gate into a channel or the source when stored data is erased electrically. The nonvolatile memory of the present invention further includes positive erasure voltage generating means, and a positive voltage higher than a conventional supply voltage generated by the positive erasure voltage generating means is applied to the channel or the source.

REFERENCES:
patent: 3660819 (1972-05-01), Frohman-Bentchkowsky
patent: 4072868 (1978-02-01), De LaMoneda et al.
patent: 4559694 (1985-12-01), Yoh et al.
patent: 4580247 (1986-04-01), Adam
patent: 4937700 (1990-06-01), Iwahashi
patent: 4951114 (1990-08-01), Lewis et al.

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